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  1. There has been increasing interest in the exploitation of advances in information technology, for example, mobile computing and wireless communications in ITS (intelligent transport systems). Classes of applic...

    Authors: Kenya Sato, Takahiro Koita and Akira Fukuda

    Citation: EURASIP Journal on Embedded Systems 2007 2007:029391

    Content type: Research Article

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  2. Nowadays, many embedded sensors allowing localization and communication are being developed to improve reliability, security and define new exploitation modes in intelligent guided transports. This paper prese...

    Authors: Yassin ElHillali, Atika Rivenq, Charles Tatkeu, JM Rouvaen and JP Ghys

    Citation: EURASIP Journal on Embedded Systems 2007 2007:079095

    Content type: Research Article

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  3. This paper describes the Sandbridge Sandblaster real-time software-defined radio platform. Specifically, we describe the SB3011 system-on-a-chip multiprocessor. We describe the software development system that...

    Authors: John Glossner, Daniel Iancu, Mayan Moudgill, Gary Nacer, Sanjay Jinturkar, Stuart Stanley and Michael Schulte

    Citation: EURASIP Journal on Embedded Systems 2007 2007:056467

    Content type: Research Article

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  4. Current emerging embedded System-on-Chip platforms are increasingly becoming multiprocessor architectures. System designers experience significant difficulties in programming these platforms. The applications ...

    Authors: Sven Verdoolaege, Hristo Nikolov and Todor Stefanov

    Citation: EURASIP Journal on Embedded Systems 2007 2007:075947

    Content type: Research Article

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  5. The increased complexity and operating frequency in current single chip microprocessors is resulting in a decrease in the performance improvements. Consequently, major manufacturers offer chip multiprocessor (...

    Authors: Kyriakos Stavrou and Pedro Trancoso

    Citation: EURASIP Journal on Embedded Systems 2007 2007:048926

    Content type: Research Article

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  6. A novel priority-based heading one detector for Exp-Golomb/CAVLC decoding of H.264/AVC is presented. It exploits the statistical distribution of input encoded codewords and adopts a nonuniform partition decodi...

    Authors: Ke Xu, Chiu-Sing Choy, Cheong-Fat Chan and Kong-Pang Pun

    Citation: EURASIP Journal on Embedded Systems 2007 2007:060834

    Content type: Research Article

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  7. Digital signal processing algorithms are of big importance in many embedded systems. Due to complexity reasons and due to the restrictions imposed on the implementations, new design methodologies are needed. I...

    Authors: Christian Haubelt, Joachim Falk, Joachim Keinert, Thomas Schlichter, Martin Streubühr, Andreas Deyhle, Andreas Hadert and Jürgen Teich

    Citation: EURASIP Journal on Embedded Systems 2007 2007:047580

    Content type: Research Article

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  8. Digital film processing is characterized by a resolution of at least 2 K (2048×1536 pixels per frame at 30 bit/pixel and 24 pictures/s, data rate of 2.2 Gbit/s); higher resolutions of 4 K (8.8 Gbit/s) and even...

    Authors: Sven Heithecker, Amilcar do Carmo Lucas and Rolf Ernst

    Citation: EURASIP Journal on Embedded Systems 2007 2007:085318

    Content type: Research Article

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  9. This case study presents UML-based design and implementation of a wireless video terminal on a multiprocessor system-on-chip (SoC). The terminal comprises video encoder and WLAN communications subsystems. In t...

    Authors: Petri Kukkala, Mikko Setälä, Tero Arpinen, Erno Salminen, Marko Hännikäinen and TimoD D Hämäläinen

    Citation: EURASIP Journal on Embedded Systems 2007 2007:085029

    Content type: Research Article

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  10. We propose novel hardware accelerator architectures for the most computationally demanding algorithms of the MPEG-4 video compression standard-motion estimation, binary motion estimation (for shape coding), an...

    Authors: Andrew Kinane, Daniel Larkin and Noel O'Connor

    Citation: EURASIP Journal on Embedded Systems 2007 2007:028735

    Content type: Research Article

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  11. A high-level optimization methodology is applied for implementing the well-known convolutional face finder (CFF) algorithm for real-time applications on mobile phones, such as teleconferencing, advanced user i...

    Authors: Franck Mamalet, Sébastien Roux and Christophe Garcia

    Citation: EURASIP Journal on Embedded Systems 2007 2007:021724

    Content type: Research Article

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  12. We focus on architectures for streaming DSP applications such as wireless baseband processing and image processing. We aim at a single generic architecture that is capable of dealing with different DSP applica...

    Authors: Gerard JM Smit, André BJ Kokkeler, Pascal T Wolkotte, Philip KF Hölzenspies, Marcel D van de Burgwal and Paul M Heysters

    Citation: EURASIP Journal on Embedded Systems 2007 2007:078082

    Content type: Research Article

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  13. Many new small and fast pseudorandom number generators are presented, which pass the most common randomness tests. They perform only a few, nonmultiplicative operations for each generated number, use very litt...

    Authors: Laszlo Hars and Gyorgy Petruska

    Citation: EURASIP Journal on Embedded Systems 2007 2007:098417

    Content type: Research Article

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  14. The synchronous language Esterel provides deterministic concurrency by adopting a semantics in which threads march in step with a global clock and communicate in a very disciplined way. Its expressive power co...

    Authors: Stephen A Edwards and Jia Zeng

    Citation: EURASIP Journal on Embedded Systems 2007 2007:052651

    Content type: Research Article

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  15. The secure establishment of cryptographic keys for symmetric encryption via key agreement protocols enables nodes in a network of embedded systems and remote agents to communicate securely in an insecure envir...

    Authors: Roshan Duraisamy, Zoran Salcic, Maurizio Adriano Strangio and Miguel Morales-Sandoval

    Citation: EURASIP Journal on Embedded Systems 2007 2007:065751

    Content type: Research Article

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  16. We show how the limited electrical power and FPGA compute resources available in a swarm of small UAVs can be shared by moving FPGA tasks from one UAV to another. A software and hardware infrastructure that su...

    Authors: David Kearney and Mark Jasiunas

    Citation: EURASIP Journal on Embedded Systems 2007 2007:048521

    Content type: Research Article

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  17. High-speed video cameras are powerful tools for investigating for instance the biomechanics analysis or the movements of mechanical parts in manufacturing processes. In the past years, the use of CMOS sensors ...

    Authors: R Mosqueron, J Dubois and M Paindavoine

    Citation: EURASIP Journal on Embedded Systems 2007 2007:024163

    Content type: Research Article

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  18. Free-space optical interconnects (FSOIs) are widely seen as a potential solution to current and future bandwidth bottlenecks for parallel processors. In this paper, an FSOI system called optical highway (OH) i...

    Authors: Rafael Gil-Otero, Theodore Lim and John F Snowdon

    Citation: EURASIP Journal on Embedded Systems 2007 2007:067603

    Content type: Research Article

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  19. The paper presents a multiple description (MD) video coder based on three-dimensional (3D) transforms. Two balanced descriptions are created from a video sequence. In the encoder, video sequence is represented...

    Authors: Andrey Norkin, Atanas Gotchev, Karen Egiazarian and Jaakko Astola

    Citation: EURASIP Journal on Embedded Systems 2007 2007:038631

    Content type: Research Article

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  20. We develop a design methodology for mapping computer vision algorithms onto an FPGA through the use of coarse-grain reconfigurable dataflow graphs as a representation to guide the designer. We first describe a...

    Authors: Mainak Sen, Ivan Corretjer, Fiorella Haim, Sankalita Saha, Jason Schlessman, Tiehan Lv, Shuvra S Bhattacharyya and Wayne Wolf

    Citation: EURASIP Journal on Embedded Systems 2007 2007:049236

    Content type: Research Article

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  21. There is currently a strong trend towards the deployment of advanced computer vision methods on embedded systems. This deployment is very challenging since embedded platforms often provide limited resources su...

    Authors: Markus Quaritsch, Markus Kreuzthaler, Bernhard Rinner, Horst Bischof and Bernhard Strobl

    Citation: EURASIP Journal on Embedded Systems 2007 2007:092827

    Content type: Research Article

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  22. Among many constraints applicable for embedded visions systems in industrial applications, desired processing performance is a determining factor of system costs. For technically and economically successful so...

    Authors: Johannes Fürtler, Konrad J Mayer, Christian Eckel, Jörg Brodersen, Herbert Nachtnebel and Gerhard Cadek

    Citation: EURASIP Journal on Embedded Systems 2007 2007:037317

    Content type: Research Article

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  23. This paper describes the design of a scalable high-performance vision system which is used in the application area of optical print inspection. The system is able to process hundreds of megabytes of image data...

    Authors: Johannes Fürtler, Peter Rössler, Jörg Brodersen, Herbert Nachtnebel, Konrad J Mayer, Gerhard Cadek and Christian Eckel

    Citation: EURASIP Journal on Embedded Systems 2007 2007:071794

    Content type: Research Article

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  24. For certain applications, custom computational hardware created using field programmable gate arrays (FPGAs) can produce significant performance improvements over processors, leading some in academia and indus...

    Authors: Stephen Craven and Peter Athanas

    Citation: EURASIP Journal on Embedded Systems 2007 2007:093652

    Content type: Research Article

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  25. This article presents an embedded multilane traffic data acquisition system based on an asynchronous temporal contrast vision sensor, and algorithms for vehicle speed estimation developed to make efficient use...

    Authors: D Bauer, AN Belbachir, N Donath, G Gritsch, B Kohn, M Litzenberger, C Posch, P Schön and S Schraml

    Citation: EURASIP Journal on Embedded Systems 2007 2007:082174

    Content type: Research Article

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  26. This paper presents a tool for automatic generation of the memory management implementation for spatial and temporal real-time video processing systems targeting field programmable gate arrays (FPGAs). The gen...

    Authors: Håkan Norell, Najeem Lawal and Mattias O'Nils

    Citation: EURASIP Journal on Embedded Systems 2006 2007:075368

    Content type: Research Article

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  27. Truncated multiplications compute truncated products, contiguous subsequences of the digits of integer products. For an n-digit multiplication algorithm of time complexity O(nα), with 1<α≤2, there is a truncated...

    Authors: Laszlo Hars

    Citation: EURASIP Journal on Embedded Systems 2006 2007:061721

    Content type: Research Article

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  28. We present methods for processing the LBPs (local binary patterns) with a massively parallel hardware, especially with CNN-UM (cellular nonlinear network-universal machine). In particular, we present a framewo...

    Authors: Olli Lahdenoja, Mika Laiho, Janne Maunu and Ari Paasio

    Citation: EURASIP Journal on Embedded Systems 2006 2007:072316

    Content type: Research Article

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  29. This paper presents our work on PfeLib—a high performance software library for image processing and computer vision algorithms for an embedded system. The main target platform for PfeLib is the TMS320C6000 ser...

    Authors: Christian Zinner, Wilfried Kubinger and Richard Isaacs

    Citation: EURASIP Journal on Embedded Systems 2006 2007:049051

    Content type: Research Article

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  30. In computer vision and more particularly in vision processing, the impressive evolution of algorithms and the emergence of new techniques dramatically increase algorithm complexity. In this paper, a novel FPGA...

    Authors: Pierre Chalimbaud and François Berry

    Citation: EURASIP Journal on Embedded Systems 2006 2007:035010

    Content type: Research Article

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  31. Tracking applications based on distributed and embedded sensor networks are emerging today, both in the fields of surveillance and industrial vision. Traditional centralized approaches have several drawbacks, ...

    Authors: Sven Fleck, Florian Busch and Wolfgang Straßer

    Citation: EURASIP Journal on Embedded Systems 2006 2007:029858

    Content type: Research Article

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  32. This paper examines the design of an FPGA-based system-on-a-chip capable of performing continuous speech recognition on medium sized vocabularies in real time. Through the creation of three dedicated pipelines...

    Authors: Jeffrey Schuster, Kshitij Gupta, Raymond Hoare and Alex K Jones

    Citation: EURASIP Journal on Embedded Systems 2006 2006:048085

    Content type: Research Article

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  33. This paper presents the design and implementation of a feature tracker on an embedded reconfigurable hardware system. Contrary to other works, the focus here is on the efficient hardware/software partitioning ...

    Authors: Felix Mühlbauer and Christophe Bobda

    Citation: EURASIP Journal on Embedded Systems 2006 2006:082564

    Content type: Research Article

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  34. Field-programmable gate arrays (FPGAs) are drawing ever increasing interest from designers of embedded wireless communications systems. They outpace digital signal processors (DSPs), through hardware execution...

    Authors: Constantin Siriteanu, Steven D Blostein and James Millar

    Citation: EURASIP Journal on Embedded Systems 2006 2006:081309

    Content type: Research Article

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  35. This paper proposes a new approach dealing with the tedious problem of NoC guaranteed traffics according to GALS constraints impelled by the upcoming large System-on-Chips with multiclock domains. Our solution...

    Authors: Samuel Evain, Jean-Philippe Diguet and Dominique Houzet

    Citation: EURASIP Journal on Embedded Systems 2006 2006:063656

    Content type: Research Article

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  36. High computational requirements combined with rapidly evolving video coding algorithms and standards are a great challenge for contemporary encoder implementations. Rapid specification changes prefer full prog...

    Authors: Ari Kulmala, Olli Lehtoranta, TimoD Hämäläinen and Marko Hännikäinen

    Citation: EURASIP Journal on Embedded Systems 2006 2006:038494

    Content type: Research Article

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