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The Chameleon Architecture for Streaming DSP Applications

EURASIP Journal on Embedded Systems volume 2007, Article number: 078082 (2007) Cite this article

Abstract

We focus on architectures for streaming DSP applications such as wireless baseband processing and image processing. We aim at a single generic architecture that is capable of dealing with different DSP applications. This architecture has to be energy efficient and fault tolerant. We introduce a heterogeneous tiled architecture and present the details of a domain-specific reconfigurable tile processor called Montium. This reconfigurable processor has a small footprint (1.8 mm2 in a 130 nm process), is power efficient and exploits the locality of reference principle. Reconfiguring the device is very fast, for example, loading the coefficients for a 200 tap FIR filter is done within 80 clock cycles. The tiles on the tiled architecture are connected to a Network-on-Chip (NoC) via a network interface (NI). Two NoCs have been developed: a packet-switched and a circuit-switched version. Both provide two types of services: guaranteed throughput (GT) and best effort (BE). For both NoCs estimates of power consumption are presented. The NI synchronizes data transfers, configures and starts/stops the tile processor. For dynamically mapping applications onto the tiled architecture, we introduce a run-time mapping tool.

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Authors and Affiliations

  1. Faculty of Electrical Engineering, Mathematics and Computer Science, University of Twente, Drienerlolaan 5, Enschede, 7522, NB, The Netherlands

    Gerard JM Smit, André BJ Kokkeler, Pascal T Wolkotte, Philip KF Hölzenspies & Marcel D van de Burgwal

  2. Recore Systems, Capitool 22, Enschede, 7521, PL, The Netherlands

    Paul M Heysters

Authors
  1. Gerard JM Smit
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  2. André BJ Kokkeler
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  3. Pascal T Wolkotte
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  4. Philip KF Hölzenspies
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  5. Marcel D van de Burgwal
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  6. Paul M Heysters
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Correspondence to Gerard JM Smit.

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Open Access This article is distributed under the terms of the Creative Commons Attribution 2.0 International License (https://creativecommons.org/licenses/by/2.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

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Smit, G.J., Kokkeler, A.B., Wolkotte, P.T. et al. The Chameleon Architecture for Streaming DSP Applications. J Embedded Systems 2007, 078082 (2007). https://doi.org/10.1155/2007/78082

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