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FPGA-Based Communications Receivers for Smart Antenna Array Embedded Systems

EURASIP Journal on Embedded Systems volume 2006, Article number: 081309 (2006) Cite this article

Abstract

Field-programmable gate arrays (FPGAs) are drawing ever increasing interest from designers of embedded wireless communications systems. They outpace digital signal processors (DSPs), through hardware execution of a wide range of parallelizable communications transceiver algorithms, at a fraction of the design and implementation effort and cost required for application-specific integrated circuits (ASICs). In our study, we employ an Altera Stratix FPGA development board, along with the DSP Builder software tool which acts as a high-level interface to the powerful Quartus II environment. We compare single- and multibranch FPGA-based receiver designs in terms of error rate performance and power consumption. We exploit FPGA operational flexibility and algorithm parallelism to design eigenmode-monitoring receivers that can adapt to variations in wireless channel statistics, for high-performing, inexpensive, smart antenna array embedded systems.

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Authors and Affiliations

  1. Department of Electrical and Computer Engineering, Queen's University, Kingston, ON, K7L 3N6, Canada

    Constantin Siriteanu & Steven D Blostein

  2. Communications Signal Processing Laboratory, Department of Electrical and Computer Engineering, Hanyang University, Seoul, Korea

    Constantin Siriteanu

  3. CMC Microsystems, Kingston, ON, K7L 3N6, Canada

    James Millar

Authors
  1. Constantin Siriteanu
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  2. Steven D Blostein
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  3. James Millar
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Correspondence to Constantin Siriteanu.

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Open Access This article is distributed under the terms of the Creative Commons Attribution 2.0 International License ( https://creativecommons.org/licenses/by/2.0 ), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

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Siriteanu, C., Blostein, S.D. & Millar, J. FPGA-Based Communications Receivers for Smart Antenna Array Embedded Systems. J Embedded Systems 2006, 081309 (2006). https://doi.org/10.1155/ES/2006/81309

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  • DOI: https://doi.org/10.1155/ES/2006/81309

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