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  • Research Article
  • Open Access

Automatic Generation of Spatial and Temporal Memory Architectures for Embedded Video Processing Systems

EURASIP Journal on Embedded Systems20062007:075368

  • Received: 1 May 2006
  • Accepted: 15 October 2006
  • Published:


This paper presents a tool for automatic generation of the memory management implementation for spatial and temporal real-time video processing systems targeting field programmable gate arrays (FPGAs). The generator creates all the necessary memory and control functionality for a functional spatio-temporal video processing system. The required memory architecture is automatically optimized and mapped to the FPGAs' memory resources thus producing an efficient implementation in terms of used internal resources. The results in this paper show that the tool is able to efficiently and automatically generate all required memory management modules for both spatial and temporal real-time video processing systems.


  • Control Structure
  • Control Functionality
  • Require Memory
  • Field Programmable Gate Array
  • Electronic Circuit

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Authors’ Affiliations

Electronics Design Division, Department of Information Technology and Media, Mid Sweden University, Sundsvall, 851 70, Sweden


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© Norell et al. 2007

This article is published under license to BioMed Central Ltd. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.