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EURASIP Journal on Embedded Systems
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Design Considerations for Scalable High-Performance Vision Systems Embedded in Industrial Print Inspection Machines

EURASIP Journal on Embedded Systemsvolume 2007, Article number: 071794 (2007) | Download Citation

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Abstract

This paper describes the design of a scalable high-performance vision system which is used in the application area of optical print inspection. The system is able to process hundreds of megabytes of image data per second coming from several high-speed/high-resolution cameras. Due to performance requirements, some functionality has been implemented on dedicated hardware based on a field programmable gate array (FPGA), which is coupled to a high-end digital signal processor (DSP). The paper discusses design considerations like partitioning of image processing algorithms between hardware and software. The main chapters focus on functionality implemented on the FPGA, including low-level image processing algorithms (flat-field correction, image pyramid generation, neighborhood operations) and advanced processing units (programmable arithmetic unit, geometry unit). Verification issues for the complex system are also addressed. The paper concludes with a summary of the FPGA resource usage and some performance results.

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Author information

Affiliations

  1. Business Unit of High Performance Image Processing, Austrian Research Centers Gmbh (ARC), Seibersdorf, 2444, Austria

    • Johannes Fürtler
    • , Jörg Brodersen
    •  & Konrad J Mayer

  2. Department of Embedded Systems, University of Applied Sciences, Höchstädtplatz 5, Vienna, 1200, Austria

    • Peter Rössler

  3. Institute of Computer Technology, Vienna University of Technology, Gußhausstraße 27-29/E384, Vienna, 1040, Austria

    • Herbert Nachtnebel

  4. Oregano Systems – Design and Consulting GesmbH, Phorusgasse 8, Vienna, 1040, Austria

    • Gerhard Cadek
    •  & Christian Eckel

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Corresponding author

Correspondence to Johannes Fürtler.

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Open Access This article is distributed under the terms of the Creative Commons Attribution 2.0 International License (https://creativecommons.org/licenses/by/2.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

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Keywords

  • Field Programmable Gate Array
  • Design Consideration
  • Digital Signal Processor
  • Image Processing Algorithm
  • Dedicated Hardware