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Speech Silicon: An FPGA Architecture for Real-Time Hidden Markov-Model-Based Speech Recognition


This paper examines the design of an FPGA-based system-on-a-chip capable of performing continuous speech recognition on medium sized vocabularies in real time. Through the creation of three dedicated pipelines, one for each of the major operations in the system, we were able to maximize the throughput of the system while simultaneously minimizing the number of pipeline stalls in the system. Further, by implementing a token-passing scheme between the later stages of the system, the complexity of the control was greatly reduced and the amount of active data present in the system at any time was minimized. Additionally, through in-depth analysis of the SPHINX 3 large vocabulary continuous speech recognition engine, we were able to design models that could be efficiently benchmarked against a known software platform. These results, combined with the ability to reprogram the system for different recognition tasks, serve to create a system capable of performing real-time speech recognition in a vast array of environments.

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Correspondence to Jeffrey Schuster.

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Open Access This article is distributed under the terms of the Creative Commons Attribution 2.0 International License ( ), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

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Schuster, J., Gupta, K., Hoare, R. et al. Speech Silicon: An FPGA Architecture for Real-Time Hidden Markov-Model-Based Speech Recognition. J Embedded Systems 2006, 048085 (2006).

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