Open Access

Fixed-Point Configurable Hardware Components

EURASIP Journal on Embedded Systems20062006:023197

https://doi.org/10.1155/ES/2006/23197

Received: 1 December 2005

Accepted: 8 May 2006

Published: 24 July 2006

Abstract

To reduce the gap between the VLSI technology capability and the designer productivity, design reuse based on IP (intellectual properties) is commonly used. In terms of arithmetic accuracy, the generated architecture can generally only be configured through the input and output word lengths. In this paper, a new kind of method to optimize fixed-point arithmetic IP has been proposed. The architecture cost is minimized under accuracy constraints defined by the user. Our approach allows exploring the fixed-point search space and the algorithm-level search space to select the optimized structure and fixed-point specification. To significantly reduce the optimization and design times, analytical models are used for the fixed-point optimization process.

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Authors’ Affiliations

(1)
ENSSAT, Université de Rennes 1
(2)
IRISA, Université de Rennes 1

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Copyright

© Romuald Rocher et al. 2006

This article is published under license to BioMed Central Ltd. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.