- Research Article
- Open Access
Fixed-Point Configurable Hardware Components
EURASIP Journal on Embedded Systemsvolume 2006, Article number: 023197 (2006)
To reduce the gap between the VLSI technology capability and the designer productivity, design reuse based on IP (intellectual properties) is commonly used. In terms of arithmetic accuracy, the generated architecture can generally only be configured through the input and output word lengths. In this paper, a new kind of method to optimize fixed-point arithmetic IP has been proposed. The architecture cost is minimized under accuracy constraints defined by the user. Our approach allows exploring the fixed-point search space and the algorithm-level search space to select the optimized structure and fixed-point specification. To significantly reduce the optimization and design times, analytical models are used for the fixed-point optimization process.
Keating M, Bricaud P: Reuse Methodology Manual. 3rd edition. Kluwer Academic, Norwell, Mass, USA; 2000.
Menard D, Guitton M, Pillement S, Sentieys O: Design and implementation of WCDMA platforms: challenges and trade-offs. Proceedings of the International Signal Processing Conference (ISPC '03), April 2003, Dallas, Tex, USA 1-6.
Seepold R, Kunzmann A: Reuse Techniques for VLSI Design. Kluwer Academic, Boston, Mass, USA; 1999.
AccelChip : Creating ip for system generator for dsp using matlab. In Tech. Rep. 95035. AccelChip, Milpitas, Calif, USA; 2004.
Banerjee P, Bagchi D, Haldar M, Nayak A, Kim V, Uribe R: Automatic conversion of floating point MATLAB programs into fixed point FPGA based hardware design. Proceedings of the 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM '03), April 2003, Napa Valley, Calif, USA 263-264.
Uribe R, Cesear T: A methodology for exploring finite-precision effects when solving linear systems of equations with least-squares techniques in fixed-point hardware. Proceedings of the 9th Annual Workshop on High Performance Embedded Computing (HPEC '05), September 2005, Lincoln, Neb, USA
Roy S, Banerjee P: An algorithm for converting floating-point computations to fixed-point in MATLAB based FPGA design. Proceedings of the 41st Design Automation Conference (DAC '04), June 2004, San Diego, Calif, USA 484-487.
Roy S, Banerjee P: An algorithm for trading off quantization error with hardware resources for MATLAB-based FPGA design. IEEE Transactions on Computers 2005,54(7):886-896. 10.1109/TC.2005.106
De Coster L, Adé M, Lauwereins R, Peperstraete JA: Code generation for compiled bit-true simulation of DSP applications. Proceedings of the 11th IEEE International Symposium on System Synthesis (ISSS '98), December 1998, Hsinchu, Taiwan 9-14.
Keding H, Willems M, Coors M, Meyr H: FRIDGE: a fixed-point design and simulation environment. Proceedings of the IEEE/ACM conference on Design, Automation and Test in Europe (DATE '98), February 1998, Paris, France 429-435.
Haykin S: Adaptive Filter Theory. 2nd edition. Prentice-Hall, Upper Saddle River, NJ, USA; 1991.
Kearfott RB: Interval computations: introduction, uses, and resources. Euromath Bulletin 1996,2(1):95-112.
Oppenheim AV, Schafer RW: Discrete-Time Signal Processing, Prentice-Hall Signal Processing Series. 2nd edition. Prentice-Hall, Upper Saddle River, NJ, USA; 1999.
Menard D, Chillet D, Sentieys O: Floating-to-fixed-point conversion for digital signal processors. EURASIP Journal on Applied Signal Processing vol. 2006, Article ID 96421 19 pages 2006. special issue design methods for DSP systems
Widrow B: Statistical analysis of amplitude quantized sampled-data systems. Transactions of the American Institute of Electrical Engineer: Part II: Applications and Industry 1960, 79: 555-568.
Barnes CW, Tran BN, Leung SH: On the statistics of fixed-point round off error. IEEE Transactions on Acoustics, Speech, and Signal Processing 1985,33(3):595-606. 10.1109/TASSP.1985.1164611
Constantinides GA, Cheung PYK, Luk W: Truncation noise in fixed-point SFGs [digital filters]. IEE Electronics Letters 1999,35(23):2012-2014. 10.1049/el:19991375
Menard D, Rocher R, Scalart P, Sentieys O: SQNR determination in non-linear and non-recursive fixed-point systems. Proceedings of the 12th European Signal Processing Conference (EUSIPCO '04), September 2004, Vienna, Austria 1349-1352.
Rocher R, Menard D, Sentieys O, Scalart P: Accuracy evaluation of fixed-point LMS algorithm. Proceedings of IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP '04), May 2004, Montreal, Quebec, Canada 5: 237-240.