- Research Article
- Open Access
Generation of Embedded Hardware/Software from SystemC
EURASIP Journal on Embedded Systems volume 2006, Article number: 018526 (2006)
Designers increasingly rely on reusing intellectual property (IP) and on raising the level of abstraction to respect system-on-chip (SoC) market characteristics. However, most hardware and embedded software codes are recoded manually from system level. This recoding step often results in new coding errors that must be identified and debugged. Thus, shorter time-to-market requires automation of the system synthesis from high-level specifications. In this paper, we propose a design flow intended to reduce the SoC design cost. This design flow unifies hardware and software using a single high-level language. It integrates hardware/software (HW/SW) generation tools and an automatic interface synthesis through a custom library of adapters. We have validated our interface synthesis approach on a hardware producer/consumer case study and on the design of a given software radiocommunication application.
Sánchez P: Embedded SW and RTOS. In Design of HW/SW Embedded Systems. Edited by: Villar E. University of Cantabria, Santander, Spain; 2001.
Forte Design Systems : Cynthesizer 3.0. http://www.forteds.com/
Celoxica : Agility compiler user guide. Celoxica, 2005
Mentor Graphics : CatapultC. http://www.mentor.com/
Ananian CS: SiliconC: a hardware backend for SUIF.
CoWare : SPW and Platform Architect. http://www.coware.com/
Gupta RK: Co-Synthesis of Hardware and Software for Digital Embedded Systems. Kluwer Academic, Norwell, Mass, USA; 1995.
Pino JL, Ha S, Lee EA, Buck JT: Software synthesis for DSP using Ptolemy. Journal of VLSI Signal Processing Systems for Signal, Image, and Video Technology 1995,9(1-2):7-21. 10.1007/BF02406468
Baladin F, Chiodo M, Giusto P, et al.: Hardware-Software Codesign of Embedded Systems: The POLIS Approach. Kluwer Academic, Norwell, Mass, USA; 1997.
Harel D, Lachover H, Naamad A, et al.: STATEMATE: a working environment for the development of complex reactive systems. IEEE Transactions on Software Engineering 1990,16(4):403-414. 10.1109/32.54292
Boussinot F, de Simone R: The ESTEREL language. Proceedings of the IEEE 1991,79(9):1293-1304. 10.1109/5.97299
Grötker T, Liao S, Martin G, Swan S: System Design with SystemC. Kluwer Academic, Norwell, Mass, USA; 2002.
Desmet D, Verkest D, De Man H: Operating system based software generation for systems-on-chip. Proceedings of 37th Design Automation Conference, June 2000, Los Angeles, Calif, USA 396-401.
Herrera F, Posadas H, Sanchez P, Villar E: Systemic embedded software generation from systemC. Proceedings of Design, Automation and Test in Europe Conference and Exhibition (DATE '03), March 2003, Munich, Germany 10142-10149.
Yu H, Dömer R, Gajski D: Embedded software generation from system level design languages. Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC '04), January 2004, Yokohama, Japan 463-468.
Pogodalla F, Hersemeule R, Coulomb P: Fast Prototyping: a system design flow for fast design, prototyping and efficient IP reuse. Proceedings of the 7th International Conference on Hardware/Software Codesign (CODES '99), May 1999, Rome, Italy 69-73.
OCP Adoption Adds Value to Prosilog. http://www.prosilog.com/news/press/documents/
Brunel J-Y, Kruijtzer WM, Kenter HJHN, et al.: COSY communication IP's. Proceedings of 37th Design Automation Conference, June 2000, Los Angeles, Calif, USA 406-409.
Gajski D, Zhu J, Dömer R, Gerstlauer A, Zhao S: SpecC: Specification Language and Methodology. Kluwer Academic, Norwell, Mass, USA; 2000.
Virtual Component Interface Standard (OCB 2 1.0) VSIA on-Chip Bus Development Working Group, March 14, 2000
Klingauf W: Systematic transaction level modeling of embedded systems with systemC. Proceedings of Design, Automation and Test in Europe (DATE '05), March 2005, Munich, Germany 1: 566-567.
Gropp W, Lusk E, Thakur R: Using MPI-2 Advanced Features of the Message Passing Interface. MIT Press, Cambridge, Mass, USA; 1999.
Ouadjaout S, Houzet D: Easy SoC design with VCI systemC adapters. Proceedings of the EUROMICRO Systems on Digital System Design (DSD '04), August-September 2004, Rennes, France 316-323.
Ouadjaout S, Albenge M-F, Houzet D: VSIA interface cosynthesis. Proceedings of the 1st IEEE International Workshop on Electronic Design, Test and Applications (DELTA '02), January 2002, Christchurch, New Zealand 43-46.
SPIRIT Consortium : SPIRIT V2.0 Alpha release. 2006.
Grandpierre T, Sorel Y: From algorithm and architecture specifications to automatic generation of distributed real-time executives: a seamless flow of graphs transformations. Proceedings of 1st ACM and IEEE International Conference on Formal Methods and Models for Co-Design (MEMOCODE '03), June 2003, Mont Saint-Michel, France 123-132.
Ziavras SG, Gerbessiotis AV, Bafna R: Coprocessor design to support MPI primitives in configurable multiprocessors. to appear in Integration, the VLSI Journal
Evain S, Diguet J-P, Houzet D: μSpider: a CAD tool for efficient NoC design. Proceedings of 22nd Norchip Conference, November 2004, Oslo, Norway 218-221.
Ouadjaout S, Houzet D: Embedded hardware/software generation from high level design languages. Proceedings of IEEE International Computer Systems & Information Technology Conference (ICSIT '05), July 2005, Algiers, Algeria
About this article
Cite this article
Ouadjaout, S., Houzet, D. Generation of Embedded Hardware/Software from SystemC. J Embedded Systems 2006, 018526 (2006). https://doi.org/10.1155/ES/2006/18526
- Intellectual Property
- Electronic Circuit
- Generation Tool
- Design Flow