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EURASIP Journal on Embedded Systems
EURASIP Journal on Embedded Systems Cover Image

System-Platforms-Based SystemC TLM Design of Image Processing Chains for Embedded Applications

EURASIP Journal on Embedded Systems volume 2007, Article number: 071043 (2007) Cite this article

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Abstract

Intelligent vehicle design is a complex task which requires multidomains modeling and abstraction. Transaction-level modeling (TLM) and component-based software development approaches accelerate the process of an embedded system design and simulation and hence improve the overall productivity. On the other hand, system-level design languages facilitate the fast hardware synthesis at behavioral level of abstraction. In this paper, we introduce an approach for hardware/software codesign of image processing applications targeted towards intelligent vehicle that uses platform-based SystemC TLM and component-based software design approaches along with HW synthesis using SystemC to accelerate system design and verification process. Our experiments show the effectiveness of our methodology.

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Author information

Affiliations

  1. EECS Department, Ecole Nationale Superieure de Techniques Avancees, 32 Boulevard Victor, Paris, 75739, France
    • Muhammad Omer Cheema
    •  & Omar Hammami
  2. Axis Department, University of Paris Sud, Orsay, 91405, France
    • Muhammad Omer Cheema
    •  & Lionel Lacassagne
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Corresponding author

Correspondence to Muhammad Omer Cheema.

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Open Access This article is distributed under the terms of the Creative Commons Attribution 2.0 International License (https://creativecommons.org/licenses/by/2.0), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

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Cheema, M.O., Lacassagne, L. & Hammami, O. System-Platforms-Based SystemC TLM Design of Image Processing Chains for Embedded Applications. J Embedded Systems 2007, 071043 (2007). https://doi.org/10.1155/2007/71043

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Keywords

  • Embed System
  • Processing Chain
  • Behavioral Level
  • Verification Process
  • Design Language