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EURASIP Journal on Embedded Systems
EURASIP Journal on Embedded Systems Cover Image
  • Research Article
  • Open Access

System-Platforms-Based SystemC TLM Design of Image Processing Chains for Embedded Applications

EURASIP Journal on Embedded Systems20072007:071043

https://doi.org/10.1155/2007/71043

©  Cheema et al. 2007

  • Received: 18 October 2006
  • Accepted: 3 May 2007
  • Published:

Abstract

Intelligent vehicle design is a complex task which requires multidomains modeling and abstraction. Transaction-level modeling (TLM) and component-based software development approaches accelerate the process of an embedded system design and simulation and hence improve the overall productivity. On the other hand, system-level design languages facilitate the fast hardware synthesis at behavioral level of abstraction. In this paper, we introduce an approach for hardware/software codesign of image processing applications targeted towards intelligent vehicle that uses platform-based SystemC TLM and component-based software design approaches along with HW synthesis using SystemC to accelerate system design and verification process. Our experiments show the effectiveness of our methodology.

Keywords

  • Embed System
  • Processing Chain
  • Behavioral Level
  • Verification Process
  • Design Language

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Authors’ Affiliations

(1)
EECS Department, Ecole Nationale Superieure de Techniques Avancees, 32 Boulevard Victor, Paris, 75739, France
(2)
Axis Department, University of Paris Sud, Orsay, 91405, France

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Copyright

© Cheema et al. 2007

This article is published under license to BioMed Central Ltd. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

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