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Table 3 Response time of implemented architecture

From: A design methodology for soft-core platforms on FPGA with SMP Linux, OpenMP support, and distributed hardware profiling system

Configuration Response time Speed-up
C1 8394 ms
C2 9322 ms 0.9 ×
C3 4751 ms 1.7 ×
C4 3198 ms 2.6 ×
C5 2474 ms 3.4 ×
C7 2257 ms 3.7 ×