EURASIP Journal on Embedded Systems

Table 4 Synthesis results.

From: An MPSoC-Based QAM Modulation Architecture with Run-Time Load-Balancing

		Area
Design unit		Slice LUTs 69120		Slice Reg. 69120	DSP48E out of 64
DSP48E ratio (%)		100	0		100	0 DSP48E out of 64
NIRA agent		63		93	0
NI w/NIRA agent		134		218	0
NI w/o NIRA agent		71		125	0
NoC 4 × 4		17496		6944	0 DSP48E out of 64
Conventional QAM		172	260	51	2	1
Pipelined QAM		434	6098	1080	32	16 DSP48E out of 64
FIR 16 taps	Transpose	43	623	86	16	1
	Polyphase	143	437	89	16	4
	Oversampling	121	222	111	1	0 DSP48E out of 64
Stream-IN PE		40		49	0
Symbol Mapper PE		22		20	0 DSP48E out of 64
FIR PE − transpose		86	1246	172	32	2
QAM PE		150	6074	1060	32	16 DSP48E out of 64
4 × 4 MPSoC-based QAM Modulator		48624 (70.35%)		15636 (22.6%)	64
NIRA	Conventional	Pipelined		MPSoC-based system w/NIRA
Frequency (MHz)
387	164.3	164.3		160

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