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Table 2 Comparison between different heuristics for two-level hierarchy with separated instruction and data caches for both levels.

From: A Combined Optimization Method for Tuning Two-Level Memory Hierarchy Considering Energy Consumption

Application (from Mibench suite)

Best mechanism (Instruction branch)

Best mechanism (Data branch)

basicmath_small

TECH-CYCLES

TEMGA

basicmath_large

TECH-CYCLES

TECH

bitcount_small

TEMGA

TECH/TEMGA

bitcount_large

TEMGA

TECH/TEMGA

dijkstra_small

TEMGA

TEMGA

dijkstra_large

TECH-CYCLES

TECH-CYCLES

patricia_small

TECH-CYCLES

TEMGA

patricia_large

TECH-CYCLES

TEMGA

qsort_small

TEMGA

TEMGA

qsort_large

TECH-CYCLES

TEMGA

susan_small

TEMGA/TECH

TCAT/TEMGA

susan_large

TECH

TECH/TCAT/ TEMGA