- Research Article
- Open Access
FPGA Accelerator for Wavelet-Based Automated Global Image Registration
EURASIP Journal on Embedded Systems volume 2009, Article number: 162078 (2009)
Wavelet-based automated global image registration (WAGIR) is fundamental for most remote sensing image processing algorithms and extremely computation-intensive. With more and more algorithms migrating from ground computing to onboard computing, an efficient dedicated architecture of WAGIR is desired. In this paper, a BWAGIR architecture is proposed based on a block resampling scheme. BWAGIR achieves a significant performance by pipelining computational logics, parallelizing the resampling process and the calculation of correlation coefficient and parallel memory access. A proof-of-concept implementation with 1 BWAGIR processing unit of the architecture performs at least 7.4X faster than the CL cluster system with 1 node, and at least 3.4X than the MPM massively parallel machine with 1 node. Further speedup can be achieved by parallelizing multiple BWAGIR units. The architecture with 5 units achieves a speedup of about 3X against the CL with 16 nodes and a comparative speed with the MPM with 30 nodes. More importantly, the BWAGIR architecture can be deployed onboard economically.
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Li, B., Dou, Y., Zhou, H. et al. FPGA Accelerator for Wavelet-Based Automated Global Image Registration. J Embedded Systems 2009, 162078 (2009). https://doi.org/10.1155/2009/162078
- Processing Unit
- Memory Access
- Processing Algorithm
- Parallel Machine
- Electronic Circuit