Table 11 Design resources for system-on-platform architecture.
Target FPGA | Critical Path | Gates | DFFs/Latches |
|---|---|---|---|
XC4VSX35FG668-10 | 5 ns | 279,774 | 3,388 |
Target FPGA | LUTs | CLB Slices | Resource |
XC4VSX35FG668-10 | 3,161 | 3,885 | 25 |
Target FPGA | Critical Path | Gates | DFFs/Latches |
|---|---|---|---|
XC4VSX35FG668-10 | 5 ns | 279,774 | 3,388 |
Target FPGA | LUTs | CLB Slices | Resource |
XC4VSX35FG668-10 | 3,161 | 3,885 | 25 |
