Open Access

Design of a Real-Time Face Detection Parallel Architecture Using High-Level Synthesis

  • Nicolas Farrugia1,
  • Franck Mamalet1Email author,
  • Sébastien Roux1,
  • Fan Yang2 and
  • Michel Paindavoine2
EURASIP Journal on Embedded Systems20082008:938256

Received: 10 March 2008

Accepted: 12 November 2008

Published: 24 December 2008


We describe a High-Level Synthesis implementation of a parallel architecture for face detection. The chosen face detection method is the well-known Convolutional Face Finder (CFF) algorithm, which consists of a pipeline of convolution operations. We rely on dataflow modelling of the algorithm and we use a high-level synthesis tool in order to specify the local dataflows of our Processing Element (PE), by describing in C language inter-PE communication, fine scheduling of the successive convolutions, and memory distribution and bandwidth. Using this approach, we explore several implementation alternatives in order to find a compromise between processing speed and area of the PE. We then build a parallel architecture composed of a PE ring and a FIFO memory, which constitutes a generic architecture capable of processing images of different sizes. A ring of 25 PEs running at 80 MHz is able to process 127 QVGA images per second or 35 VGA images per second.

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Authors’ Affiliations

MAchine to machine technologies Tangible Interactions expertiSe on devices Laboratory (MATIS), Orange Labs, Meylan, France
Laboratory of Electronics Informatics Image (LE2i), Health-STIC Federative Research Institute (IFR100), Burgundy University-Engineer Science Center, Dijon, France


© Nicolas Farrugia et al. 2008

This article is published under license to BioMed Central Ltd. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.