Stream Execution on Embedded Wide-Issue Clustered VLIW Architectures
EURASIP Journal on Embedded Systems volume 2008, Article number: 516240 (2009)
Very long instruction word- (VLIW-) based processors have become widely adopted as a basic building block in modern System-on-Chip designs. Advances in clustered VLIW architectures have extended the scalability of the VLIW architecture paradigm to a large number of functional units and very-wide-issue widths. A central challenge with wide-issue clustered VLIW architecture is the availability of programming and automated compiler methods that can fully utilize the available computational resources. Existing compilation approaches for clustered-VLIW architectures are based on extensions of previously developed scheduling algorithms that primarily focus on the maximization of instruction-level parallelism (ILP). However, many applications do not have sufficient ILP to fully utilize a large number of functional units. On the other hand, many applications in digital communications and multimedia processing exhibit enormous amounts of data-level parallelism (DLP). For these applications, the streaming programming paradigm has been developed to explicitly expose coarse-grained data-level parallelism as well as the locality of communication between coarse-grained computation kernels. In this paper, we investigate the mapping of stream programs to wide-issue clustered VLIW processors. Our work enables designers to leverage their existing investments in VLIW-based architecture platforms to harness the advantages of the stream programming paradigm.
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Yan, S., Lin, B. Stream Execution on Embedded Wide-Issue Clustered VLIW Architectures. J Embedded Systems 2008, 516240 (2009). https://doi.org/10.1155/2008/516240
- Schedule Algorithm
- Functional Unit
- Basic Building Block
- Computation Kernel
- Programming Paradigm