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  • Research Article
  • Open Access

An Evaluation of Dynamic Partial Reconfiguration for Signal and Image Processing in Professional Electronics Applications

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EURASIP Journal on Embedded Systems20092008:367860

  • Received: 29 February 2008
  • Accepted: 3 November 2008
  • Published:


Signal and image processing applications require a lot of computing resources. For low-volume applications like in professional electronics applications, FPGA are used in combination with DSP and GPP in order to reach the performances required by the product roadmaps. Nevertheless, FPGA designs are static, which raises a flexibility issue with new complex or software defined applications like software-defined radio (SDR). In this scope, dynamic partial reconfiguration (DPR) is used to bring a virtualization layer upon the static hardware of FPGA. During the last decade, DPR has been widely studied in academia. Nevertheless, there are very few real applications using it, and therefore, there is a lack of feedback providing relevant issues to address in order to improve its applicability. This paper evaluates the interest and limitations when using DPR in professional electronics applications and provides guidelines to improve its applicability. It makes a fair evaluation based on experiments made on a set of signal and image processing applications. It identifies the missing elements of the design flow to use DPR in professional electronics applications. Finally, it introduces a fast reconfiguration manager providing an 84-time improvement compared to the vendor solution.


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Authors’ Affiliations

Université catholique de Louvain, Place du Levant 3, 1348 Louvain-la-Neuve, Belgium
Thales Communications, Boulevard de Valmy 160, 92704 Colombes, France
CESVIT MICROELETTRONICA, Via F. Frediani, 59100 Prato, Italy
Tecnopolis CSATA, Str P. Casamassima km 3, 70010 Valenzano Bari, Italy
MBDA, Avenue Réaumur 1, 92358 Le Plessis Robinson, France
Thales Communications, Rue des Frères Taymans 28, 1480 Tubize, Belgium
Aerospace Division, Thales, Avenue de la 1ere DFL 10, 29283 Brest, France
CEA LIST, CEN Saclay, 91191 Gif Sur Yvette, France
ELETTRONICA, Via Tiburtina Valeria km 13, 700, 00131 Rome, Italy
Thales Italia, Via E. Mattei 20, 66013 Chieti Scalo, Italy


© Philippe Manet et al. 2008

This article is published under license to BioMed Central Ltd. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.