Fig. 3
From: A novel power model for future heterogeneous 3D chip-multiprocessors in the dark silicon age
Dynamic power vs. leakage power for an 8-core system in 32- and 22-nm technologies
Fig. 3 | EURASIP Journal on Embedded Systems
From: A novel power model for future heterogeneous 3D chip-multiprocessors in the dark silicon age
Dynamic power vs. leakage power for an 8-core system in 32- and 22-nm technologies