Skip to main content

Advertisement

Table 7 Response time on the target

From: A design methodology for soft-core platforms on FPGA with SMP Linux, OpenMP support, and distributed hardware profiling system

Nodes Configuration RT Threads Speed-up
20 C10 57 ms 4
30 C10 100 ms 4
40 C10 166 ms 4
50 C1 1644 ms
50 C10 839 ms 2
50 C10 634 ms 4 2.6 ×
60 C10 1046 ms 4
70 C10 1263 ms 4
80 C1 10,279 ms
80 C10 2989 ms 4 3.4 ×
90 C10 4319 ms 4
100 C1 8100 ms
100 C10 1838 ms 4 4.4 ×