Skip to main content
EURASIP Journal on Embedded Systems

Table 6 Configuration parameters for LEON3

From: A design methodology for soft-core platforms on FPGA with SMP Linux, OpenMP support, and distributed hardware profiling system

Parameter

Attribute

Value

Clock generation

System clock frequency

75 MHz

Processor

Number of processors

4

Integer unit

SPARC register windows

8

FPU

Enable FPU

Yes

I-Cache

Sets/WS/LS/CS

2 8 32 16

D-Cache

Sets/WS/LS/CS

4 4 32 16

Back to article page