From: A design methodology for soft-core platforms on FPGA with SMP Linux, OpenMP support, and distributed hardware profiling system
Parameter
Attribute
Value
Clock generation
System clock frequency
75 MHz
Processor
Number of processors
4
Integer unit
SPARC register windows
8
FPU
Enable FPU
Yes
I-cache
Sets/WS/LS/CS
1 1 16 1
D-cache
2 4 16 8