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Table 2 Memory power consumption details for instruction memory (IP reassembly) and data memory (MD5)

From: Low power memory allocation and mapping for area-constrained systems-on-chips

Instruction memory (IP reassembly)  
Mems Num Size Banks P (mW) Reads (%)   Funcs
1 1 64K 16 1.6708 100   241
4 0.2856  
  1 512 1 0.2057 95.1   9
  1 2K 2 0.0108 3.1   9
  1 4K 2 0.0081 1.7   8
  1 32K 16 0.0022 0.1   215
  Interconnect 0.0588    
Data memory (MD5)  
Mems Num Size Banks P[mW] Reads (%) Writes (%) Objs
1 1 2M 16 0.7350 100 100 37
8 0.2442
  1 2K 2 0.0081 33.4 30.9 33
  2 8K 8 0.0068 20.4 0 1
  5 256K 16 0.1412 46.2 69.1 3
  Interconnect 0.0882