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EURASIP Journal on Embedded Systems
Figure 20 | EURASIP Journal on Embedded Systems

Figure 20

From: Use of compiler optimization of software bypassing as a method to improve energy efficiency of exposed data path architectures

Figure 20

Relative energy consumption of various parts of the processor for each architecture. On the left side, we present results obtained using the top-down scheduler and on the right side, corresponding results using the bottom-up scheduler for (a) fully connected without bypassing, (b) reduced connectivity without bypassing, (c) fully connected with software bypassing, and (d) reduced connectivity and bypassing.

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