Table 7 Synthesis results
From: Embedded reconfigurable synchronization & acquisition ASIP for a multi-standard OFDM receiver
FPGA type | Altera Stratix III EP3SC150 |
|---|---|
Total ALUT | 752/113,600 (< 1%) |
DSP blocks (18bit) | 3 |
Dedicated logic registers | 262/113,600 (< 1%) |
Block RAM | 54.4844/5499 Kbit (< 1%) |
Max. clock frequency | 159MHz |