Table 1 Configuration space for the cache hierarchy.
From: A Combined Optimization Method for Tuning Two-Level Memory Hierarchy Considering Energy Consumption
Parameters | C ache level1(instruction and data) | C ache level2(instruction and data) |
|---|---|---|
Cache size | 2 Kb, 4 Kb, 8 Kb | 16 Kb, 32 Kb, 64 Kb |
Line size | 16B, 32 B, 64 B | 16 B, 32 B, 64 B |
Associativity | 1, 2, 4 | 1, 2, 4 |