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EURASIP Journal on Embedded Systems

Table 4 CPU usage time.

From: A Systematic Development Methodology for Mixed-Mode Behavioral Models of In-Vehicle Embedded Electronic Systems

Test case description

Behavioral model

Spectre model

Simulation period

Bus signal integrity

3.8 s

372.8 s

102 s

Bus state transitions

3.5 s

512.2 s

400 s

Vcc Power supply failure

2.5 s

162.9 s

120 s

Wake-up pattern detection

7.8 s

2622.8 s

235 s

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