Table 7 Specifications of neural network-based FPGA face detector
Feature | Specification |
|---|---|
FPU Bit-width | 32, 24, 20, 16, 12 |
Frequency | 48/58/77/80/85 MHz |
Slices (Xilinx Spartan) | 1077/878/750/650/556 (FPU32 / FPU16) |
Arithmetic unit | IEEE 754 single precision with bit-width reduced FPU |
Networks | 2 Layers (400/300/1 node) |
Input Data Size | 20×20 (400 pixel image) |
Operating Time | 8.7/7.4/5.5/5.3/5 ms/frame |
Frame Rate | 114/136/182/190/201 seconds |