Skip to main content

Table 1 MRRE and ARRE of Five Different FBUs.

From: Performance Analysis of Bit-Width Reduced Floating-Point Arithmetic Units in FPGAs: A Case Study of Neural Network-Based Face Detector

Bit-width

Unit

 

Range

MRRE(ulp)

ARRE

FPU32

2, 8, 23

FPU24

2, 6, 17

 

FPU20

2, 6, 13

 

FPU16

2, 6, 9

FPU12

2, 6, 5

 

  1. : radix, : exponent, : mantisa .