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Figure 1 | EURASIP Journal on Embedded Systems

Figure 1

From: A Priori Implementation Effort Estimation for Hardware Design Based on Independent Path Analysis

Figure 1

The flow of estimating the required implementation effort. The starting point is a behavioural description in C of the algorithm to be implemented in hardware (e.g., via VHDL). From this description, an HCDFG is generated and measured to identify the number of independent paths in the algorithm. This measure, combined with the experience of the developers, gives an estimate of the required implementation effort (expressed in time).

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