Open Access

Generation of Embedded Hardware/Software from SystemC

EURASIP Journal on Embedded Systems20062006:018526

DOI: 10.1155/ES/2006/18526

Received: 30 November 2005

Accepted: 27 June 2006

Published: 13 August 2006

Abstract

Designers increasingly rely on reusing intellectual property (IP) and on raising the level of abstraction to respect system-on-chip (SoC) market characteristics. However, most hardware and embedded software codes are recoded manually from system level. This recoding step often results in new coding errors that must be identified and debugged. Thus, shorter time-to-market requires automation of the system synthesis from high-level specifications. In this paper, we propose a design flow intended to reduce the SoC design cost. This design flow unifies hardware and software using a single high-level language. It integrates hardware/software (HW/SW) generation tools and an automatic interface synthesis through a custom library of adapters. We have validated our interface synthesis approach on a hardware producer/consumer case study and on the design of a given software radiocommunication application.

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Authors’ Affiliations

(1)
Institut d'Electronique et de Télécommunications de Rennes (IETR), UMR CNRS 6164, Institut National des Sciences Appliquées (INSA)

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Copyright

© S. Ouadjaout and D. Houzet 2006

This article is published under license to BioMed Central Ltd. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.