Skip to main content

A Real-Time Wavelet-Domain Video Denoising Implementation in FPGA

Abstract

The use of field-programmable gate arrays (FPGAs) for digital signal processing (DSP) has increased with the introduction of dedicated multipliers, which allow the implementation of complex algorithms. This architecture is especially effective for data-intensive applications with extremes in data throughput. Recent studies prove that the FPGAs offer better solutions for real-time multiresolution video processing than any available processor, DSP or general-purpose. FPGA design of critically sampled discrete wavelet transforms has been thoroughly studied in literature over recent years. Much less research was done towards FPGA design of overcomplete wavelet transforms and advanced wavelet-domain video processing algorithms. This paper describes the parallel implementation of an advanced wavelet-domain noise filtering algorithm, which uses a nondecimated wavelet transform and spatially adaptive Bayesian wavelet shrinkage. The implemented arithmetic is decentralized and distributed over two FPGAs. The standard composite television video stream is digitalized and used as a source for real-time video sequences. The results demonstrate the effectiveness of the developed scheme for real-time video processing.

[1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41]

References

  1. Cocchia F, Carrato S, Ramponi G: Design and real-time implementation of a 3-D rational filter for edge preserving smoothing. IEEE Transactions on Consumer Electronics 1997,43(4):1291-1300. 10.1109/30.642398

    Article  Google Scholar 

  2. Arce G: Multistage order statistic filters for image sequence processing. IEEE Transactions on Signal Processing 1991,39(5):1146-1163. 10.1109/78.80969

    Article  Google Scholar 

  3. Zlokolica V, Philips W: Motion and detail adaptive denoising of video. Image Processing: Algorithms and Systems III, January 2004, San Jose, Calif, USA, Proceedings of SPIE 5298: 403-412.

    Google Scholar 

  4. Hong L, Brzakovic D: Bayesian restoration of image sequences using 3-D Markov random fields. Proceedings of the IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP '89), May 1989, Glasgow, UK 3: 1413-1416.

    Google Scholar 

  5. Brailean J, Katsaggelos A: Simultaneous recursive displacement estimation and restoration of noisy-blurred image sequences. IEEE Transactions on Image Processing 1995,4(9):1236-1251. 10.1109/83.413168

    Article  Google Scholar 

  6. van Roosmalen P, Westen S, Lagendijk R, Biemond J: Noise reduction for image sequences using an oriented pyramid thresholding technique. IEEE International Conference on Image Processing, September 1996, Lausanne, Switzerland 1: 375-378.

    Article  Google Scholar 

  7. Selesnick I, Li K: Video denoising using 2D and 3D dual-tree complex wavelet transforms. Wavelets: Applications in Signal and Image Processing X, August 2003, San Diego, Calif, USA, Proceedings of SPIE 5207: 607-618.

    Google Scholar 

  8. Rusanovskyy D, Egiazarian K: Video denoising algorithm in sliding 3d dct domain. In Proceedings of the 7th International Conference on Advanced Concepts for Intelligent Vision Systems (ACIVS '05), September 2005, Antwerp, Belgium, Lecture Notes on Computer Science Edited by: Blanc-Talon J, Philips W, Popescu D, Scheunders P. 3708: 618-625.

    Google Scholar 

  9. Pižurica A, Zlokolica V, Philips W: Noise reduction in video sequences using wavelet-domain and temporal filtering. Wavelet Applications in Industrial Processing, October 2003, Providence, RI, USA , Proceedings of SPIE 5266: 48-59.

    Article  Google Scholar 

  10. Zlokolica V, Pižurica A, Philips W: Video denoising using multiple class averaging with multiresolution. The International Workshop on Very Low Bitrate Video Coding (VLBV '03), September 2003, Madrid, Spain 172-179.

    Google Scholar 

  11. Draper BA, Beveridge JR, Bohm APW, Ross C, Chawathe M: Accelerated image processing on FPGAs. IEEE Transactions on Image Processing 2003,12(12):1543-1551. 10.1109/TIP.2003.819226

    Article  Google Scholar 

  12. Al-Haj AM: Fast discrete wavelet transformation using FPGAs and distributed arithmetic. International Journal of Applied Science and Engineering 2003,1(2):160-171.

    Google Scholar 

  13. Goslin G: A guide to using field programmable gate arrays (FPGAs) for application-specific digital signal processing performance. XILINX Inc., 1995

  14. Dick C: Implementing area optimized narrow-band FIR filters using Xilinx FPGAs. Configurable Computing: Technology and Applications, November 1998, Boston, Mass, USA, Proceedings of SPIE 3526: 227-238.

    Google Scholar 

  15. Turney RD, Dick C, Reza A: Multirate filters and wavelets: from theory to implementation. XILINX Inc

  16. Ritter J, Molitor P: A pipelined architecture for partitioned DWT based lossy image compression using FPGA's. ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA '01), February 2001, Monterey, Calif, USA 201-206.

    Google Scholar 

  17. Nibouche M, Bouridane A, Murtagh F, Nibouche O: FPGA-Based Discrete Wavelet Transforms System. School of Computer Science, The Queen's University of Belfast, Belfast, UK; 2001.

    Book  Google Scholar 

  18. Trenas MA, Lopez J, Zapata EL: FPGA implementation of wavelet packet transform with reconfigurable tree structure. Proceedings of the 26th Euromicro Conference (EUROMICRO '00), September 2000, Maastricht, The Netherlands 1244-1251.

    Google Scholar 

  19. Wiatr K, Russek P: Embedded zero wavelet coefficient coding method for FPGA implementation of video codec in real-time systems. The International Conference on Information Technology: Coding and Computing (ITCC '00), March 2000, Las Vegas, Nev, USA 146-151.

    Google Scholar 

  20. Mathen SG: Wavelet transform based adaptive image compression on FPGA, M.S. thesis. University of Kansas, Manhattan, Kan, USA; 2000.

    Google Scholar 

  21. Ballagh JB: An FPGA-based run-time reconfigurable 2-D discrete wavelet transform core, M.S. thesis. Virginia Polytechnic Institute, Blacksburg, Va, USA; 2001.

    Google Scholar 

  22. Nachtergaele L, Vanhoof B, Peón M, Lafruit G, Bormans J, Bolsens I: Implementation of a scalable MPEG-4 wavelet-based visual texture compression system. Proceedings of the 36th Design Automation Conference (DAC '99), June 1999, New Orleans, La, USA 333-336.

    Google Scholar 

  23. Calderbank AR, Daubechies I, Sweldens W, Yeo B-L: Wavelet transforms that map integers to integers. Applied and Computational Harmonic Analysis 1998,5(3):332-369. 10.1006/acha.1997.0238

    Article  MathSciNet  MATH  Google Scholar 

  24. Sweldens W: Lifting scheme: a new philosophy in biorthogonal wavelet constructions. Wavelet Applications in Signal and Image Processing III, July 1995, San Diego, Calif, USA, Proceedings of SPIE 2569: 68-79.

    Article  Google Scholar 

  25. Sweldens W: Wavelets and the lifting scheme: a 5 minute tour. Zeitschrift für Angewandte Mathematik und Mechanik 1996,76(2):41-44.

    MathSciNet  MATH  Google Scholar 

  26. Dillen G, Georis B, Legat J-D, Cantineau O: Combined line-based architecture for the5–3and9–7wavelet transform of JPEG2000. IEEE Transaction on Circuits and Systems for Video Technology 2003,13(9):944-950. 10.1109/TCSVT.2003.816518

    Article  Google Scholar 

  27. Wu B-F, Hu Y-Q: An efficient VLSI implementation of the discrete wavelet transform using embedded instruction codes for symmetric filters. IEEE Transactions on Circuits and Systems for Video Technology 2003,13(9):936-943. 10.1109/TCSVT.2003.816509

    Article  Google Scholar 

  28. Katona M, Pižurica A, Zlokolica V, Teslić N, Philips W: Real-time wavelet domain video denoising implemented in FPGA. Wavelet Applications in Industrial Processing II, October 2004, Philadelphia, Pa, USA, Proceedings of SPIE 5607: 63-70.

    Article  Google Scholar 

  29. Katona M, Pižurica A, Teslić N, Kovacevic V, Philips W: FPGA design and implementation of a wavelet-domain video denoising system. In Proceedings of the 7th International Conference on Advanced Concepts for Intelligent Vision Systems (ACIVS '05), September 2005, Antwerp, Belgium, Lecture Notes on Computer Science Edited by: Blanc-Talon J, Popescu D, Philips W, Scheunders P. 3708: 650-657.

    Google Scholar 

  30. Mallat S, Zhong S: Characterization of signals from multiscale edges. IEEE Transactions on Pattern Analysis and Machine Intelligence 1992,14(7):710-732. 10.1109/34.142909

    Article  Google Scholar 

  31. SystemC Version 2.0 Users Guide SystemC Inc., 2002, http://www.systemc.org

  32. Katona M, Teslić N, Kovacevic V, Temerinac M: Test environment for bluetooth baseband inegrated circuit development. In Proceedings of the 5th International Conference on Telecommunications in Modern Satellite, Cable and Broadcasting Services (TELSIKS '01), Septmeber 2001, Nis, Yoguslavia Edited by: Milovanovic BD. 2: 405-408.

  33. Katona M, Teslić N, Krajacevic Z: FPGA design with SystemC. In The 10th International Conference on Mixed Design of Integrated Circuits and Systems (MIXDES '03), June 2003, Lodz, Poland Edited by: Napieralski A. 1: 220-223.

    Google Scholar 

  34. Daubechies I: Ten Lectures on Wavelets. SIAM, Philadelphia, Pa, USA; 1992.

    Book  MATH  Google Scholar 

  35. Virtex II Platform FPGA: Complete Data Sheet, XILINX Inc., 2004, http://www.xilinx.com

  36. Pižurica A, Philips W: Estimating the probability of the presence of a signal of interest in multiresolution single- and multiband image denoising. IEEE Transactions on Image Processing 2006,15(3):654-665.

    Article  Google Scholar 

  37. Donoho DL, Johnstone IM: Adapting to unknown smoothness via wavelet shrinkage. Journal of the American Statistical Association 1995,90(432):1200-1224. 10.2307/2291512

    Article  MathSciNet  MATH  Google Scholar 

  38. Zlokolica V, Pižurica A, Philips W: Noise estimation for video processing based on spatial-temporal gradient histograms. to appear in IEEE Signal Processing Letters

  39. VPC 3205C Video Processor Family, ITT Semiconductors: ITT Intermetall, 1997, http://www.micronas.com

  40. CHIPit Gold Edition Handbook, ProDesign Electronic & CAD Layout, 2003, http://www.prodesigncad.de

  41. DDPB 3310B Display and Deflection Processor, Micronas Intermetal, 1998, http://www.micronas.com

Download references

Author information

Authors and Affiliations

Authors

Corresponding author

Correspondence to Mihajlo Katona.

Rights and permissions

Open Access This article is distributed under the terms of the Creative Commons Attribution 2.0 International License ( https://creativecommons.org/licenses/by/2.0 ), which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.

Reprints and permissions

About this article

Cite this article

Katona, M., Pižurica, A., Teslić, N. et al. A Real-Time Wavelet-Domain Video Denoising Implementation in FPGA. J Embedded Systems 2006, 016035 (2006). https://doi.org/10.1155/ES/2006/16035

Download citation

  • Received:

  • Accepted:

  • Published:

  • DOI: https://doi.org/10.1155/ES/2006/16035

Keywords