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EURASIP Journal on Embedded Systems

Table 4 System design and simulation parameters.

From: SmartCell: An Energy Efficient Coarse-Grained Reconfigurable Architecture for Stream-Based Applications

System dimension

4 by 4

Design tools

ModelSim, Synopsys CAD tools

Library

TSMC process

Synthesis environment

Worst case condition

Voltage

1 V

Simulation frequency

100 MHz

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